The present disclosure relates to a method of forming fine patterns of a semiconductor device, and more particularly, to a method of forming fine patterns of a semiconductor device, by which fine patterns are repeatedly formed at intervals of a fine pitch by using a double patterning process, thereby overcoming a resolution limit of existing exposure equipment.
Forming fine patterns is significant in manufacturing highly integrated semiconductor devices. To integrate many elements within a small area, the size of the individual elements should be minimized. Moreover, to form small elements, a pitch corresponding to a sum of the width of each pattern to be formed and an interval between adjacent patterns should be designed to be small. Furthermore, with the recent reduction in the design rules of semiconductor devices, there may be a limit in forming desired fine-pitch patterns due to a resolution limit in photolithography for forming patterns required to manufacture semiconductor devices. To overcome the resolution limit in such photolithographic processes, some methods of forming fine hard mask patterns having fine pitches by using a double patterning process have been proposed. However, as deposition and etching processes are performed within a fine aperture having a high aspect ratio and a small width according to the double patterning process, the processes may be complex and the manufacturing costs may be high.
Thus, there is a need in the art for a method of forming fine patterns of a semiconductor device which does not require the use of expensive deposition equipment.